rev 2.0 ?2010 advanced linear devices, inc. 415 tasman drive, sunnyvale, ca 94089-1706 tel: (408) 747-1155 fax: (408) 747-1286 www.aldinc.com quad rail-to-rail cmos operational amplifier ald4704a/ald4704b ald4704 a dvanced l inear d evices, i nc. operating temperature range 0 c to +70 c0 c to +70 c -55 c to 125 c 14-pin 14-pin 14-pin small outline plastic dip cerdip package (soic) package package ald4704asbl ald4704apbl ALD4704ADB ald4704bsbl ald4704bpbl ald4704bdb ald4704sbl ald4704pbl ald4704db * contact factory for leaded (non-rohs) or high temperature versions. ordering information (?l? suffix denotes lead-free (rohs)) general description the ald4704a/ald4704b/ald4704 is a dual monolithic operational amplifier with mosfet input that has rail-to-rail input and output voltage ranges. the input voltage range and output voltage range are very close to the positive and negative power supply voltages. typically the input voltage can be beyond positive power supply voltage v + or the negative power supply voltage v - by up to 300mv. the output voltage swings to within 60mv of either positive or negative power supply voltages at rated load. with high impedance load, the output voltage of the ald4704a/ ald4704b/ald4704 approaches within 1mv of the power supply rails. this device is designed as an alternative to the popular j-fet input operational amplifier in applications where lower operating voltages, such as 9v battery or 3.25v to 5v power supplies are being used. the ald4704a/ald4704b/ald4704 offers high slew rate of 5v/ s. it is designed and manufactured with advanced linear devices' standard enhanced acmos silicon gate cmos process, and it offers low unit cost and exceptional reliability. the rail-to-rail input and output feature of the ald4704a/ald4704b/ ald4704 expands signal voltage range for a given operating supply voltage and allows numerous analog serial stages to be implemented without losing operating voltage margin. the output stage is designed to drive up to 10ma into 400pf capacitive and 1.5k ? resistive loads at unity gain and up to 4000pf at a gain of 5. short circuit protection to either ground or the power supply rails is at approximately 15ma clamp current. due to complementary output stage design, the output can source and sink 10ma into a load with symmetrical drive and is ideally suited for applications where push-pull voltage drive is desired. for each of the operational amplifier, the offset voltage is trimmed on- chip to eliminate the need for external nulling in many applications. for precision applications, the output is designed to settle to 0.1% in 2 s. in large signal buffer applications, the operational amplifier can function as an ultrahigh input impedance voltage follower /buffer that allows input and output voltage swings from positive to negative supply voltages. this feature is intended to greatly simplify systems design and eliminate higher voltage power supplies in many applications. additionally, robust design and rigorous screening make this device especially suitable for operation in temperature-extreme environments and rugged conditions. applications ? voltage amplifier ? voltage follower/buffer ? charge integrator ? photodiode amplifier ? data acquisition systems ? high performance portable instruments ? signal conditioning circuits ? low leakage amplifiers ? active filters ? sample/hold amplifier ? picoammeter ? current to voltage converter ? coaxial cable driver ? capacitive sensor amplifier ? piezoelectric transducer amplifier features ? rail-to-rail input and output voltage ranges ? 5.0v/ s slew rate ? symmetrical push-pull output drive ? inputs can extend beyond supply rails by 300mv ? outputs settle to 2mv of supply rails ? high capacitive load capability -- up to 4000pf ? no frequency compensation required -- unity gain stable ? extremely low input bias currents -- 1.0pa typical (20pa max.) ? ideal for high source impedance applications ? high voltage gain -- 100v/mv typical ? output short circuit protected ? unity gain bandwidth of 2.1mhz ? suitable for rugged, temperature-extreme environments pin configuration top view sbl, pbl, db packages out d -in d +in d v- +in c -in c out c out a -in a +in a v + +in b -in b out b 1 2 3 4 5 6 7 8 9 10 11 12 13 14
ald4704a/ald4704b advanced linear devices 2 of 9 ald4704 absolute maximum ratings supply voltage, v + referenced to v - -0.3v to v + +10.6v supply voltage, v s referenced to v - 5.3v differential input voltage range -0.3v to v + +0.3v power dissipation 600 mw operating tempurature range sbl, pbl packages 0 c to +70 c db package -55 c to +125 c storage tempurature range -65 c to +150 c lead tempurature, 10 seconds +260 c caution: esd sensitive device. use static control procedures in esd controlled environment. supply v s 3.25 5.0 3.25 5.0 3.25 5.0 v dual supply voltage v + 6.5 10.0 6.5 10.0 6.5 10.0 v single supply input offset v os 1.0 2.0 5.0 mv r s 100k ? voltage 1.5 3.0 6.0 mv 0 c t a +70 c input offset i os 1.0 15 1.0 15 1.0 15 pa t a = 25 c current 240 240 240 pa 0 c t a +70 c input bias i b 1.0 20 1.0 20 1.0 20 pa t a = 25 c current 300 300 300 pa 0 c t a +70 c input voltage v ir -5.3 5.3 -5.3 5.3 -5.3 5.3 v range input r in 10 12 10 12 10 12 ? resistance input offset tcv os 555 v/ cr s 100k ? voltage drift power supply psrr 65 80 65 80 60 80 db r s 100k ? rejection ratio 0 c t a +70 c common mode cmrr 65 83 65 83 60 83 db r s 100k ? rejection ratio 0 c t a +70 c large signal a v 15 28 15 28 10 28 v/mv r l = 100k ? voltage gain 100 100 100 v/mv r l 1m ? v/mv r l = 10k ? output v o low -4.96 -4.90 -4.96 -4.90 -4.96 -4.90 v r l = 10k ? voltage v o high 4.90 4.95 4.90 4.95 4.90 4.95 v 0 c t a +70 c range v o low -4.998 -4.99 -4.998 -4.99 -4.998 -4.99 v r l 1m ? v o high 4.99 4.998 4.99 4.998 4.99 4.998 v 0 c t a +70 c output short i sc 15 15 15 ma circuit current supply i s 10 13 10 13 10 13 ma v in = -5.0v current no load power p d 130 130 130 mw all amplifiers, no load dissipation v s = 5.0v input c in 111pf capacitance bandwidth b w 2.1 2.1 2.1 mhz slew rate s r 5.0 5.0 5.0 v/ sa v = +1 r l = 2.0k ? rise time t r 0.1 0.1 0.1 sr l = 10k ? overshoot 15 15 15 % r l = 10k ? factor c l = 100pf operating electrical characteristics t a = 25 c v s = 5.0v unless otherwise specified 4704a 4704b 4704 parameter symbol min typ max min typ max min typ max unit test conditions
ald4704a/ald4704b advanced linear devices 3 of 9 ald4704 operating electrical characteristics (cont'd) input offset v os 2.0 4.0 7.0 mv r s 100k ? voltage input offset i os 8.0 8.0 8.0 na current input bias i b 10.0 10.0 10.0 na current power supply psrr 60 75 60 75 60 75 db r s 100k ? rejection ratio common mode cmrr 60 83 60 83 60 83 db r s 100k ? rejection ratio large signal a v 10 25 10 25 10 25 v/mv r l =10k ? voltage gain output voltage v o low -4.9 -4.8 -4.9 -4.8 -4.9 -4.8 v r l =10k ? range v o high 4.8 4.9 4.8 4.9 4.8 4.9 v r l =10k ? v s = 5.0v -55 c t a +125 c unless otherwise specified 4704adb 4704bdb 4704db parameter symbol min typ max min typ max min typ max unit test conditions maximum load c l 400 400 400 pf gain = 1 capacitance 4000 4000 4000 pf gain = 5 input noise voltage e n 26 26 26 nv/ hz f =1khz input current noise i n 0.6 0.6 0.6 fa/ hz f =10hz settling t s 5.0 5.0 5.0 s 0.01% time 2.0 2.0 2.0 s 0.1% a v = -1 r l = 5k ? c l = 50pf t a = 25 c v s = 5.0v unless otherwise specified 4704a 4704b 4704 parameter symbol min typ max min typ max min typ max unit test conditions
ald4704a/ald4704b advanced linear devices 4 of 9 ald4704 e input g e (v) 7 6 5 typical performance characteristics input bias current as a function of ambient temperature ambient temperature ( c) 1000 100 10 0.1 1.0 input bias current (pa) 100 -25 0 75 125 50 25 -50 v s = 5.0v 10000 common mode input voltage range as a function of supply voltage supply voltage (v) common mode input voltage range (v) 7 6 5 4 3 2 2 3 4 5 6 7 t a = 25 c open loop voltage gain as a function of supply voltage and temperature supply voltage (v) 1000 100 10 1 open loop voltage gain (v/mv) 0 2 4 6 r l = 10k ? r l = 5k ? } -55 c } +25 c } +125 c 8 supply current as a function of supply voltage supply voltage ( v ) 0 supply current (ma) 0 1 2 3 4 5 6 inputs grounded output unloaded +80 c +25 c t a = -55 c -25 c 7 1 2 3 4 5 6 7 8 +125 c design & operating notes: 1. the ald4704a/ald4704b/ald4704 cmos operational amplifier uses a 3 gain stage architecture and an improved frequency compen- sation scheme to achieve large voltage gain, high output driving capability, and better frequency stability. the ald4704a/ald4704b/ ald4704 is internally compensated for unity gain stability using a novel scheme. this design produces a clean single pole roll off in the gain characteristics while providing for more than 70 degrees of phase margin at the unity gain frequency. a unity gain buffer using the ald4704a/ald4704b/ald4704 will typically drive 400pf of external load capacitance without stability problems. in the inverting unity gain configuration, it can drive up to 800pf of load capacitance. compared to other cmos operational amplifiers, the ald4704a/ald4704b/ ald4704 is much more resistant to parasitic oscillations. 2. the ald4704a/ald4704b/ald4704 has complementary p-channel and n-channel input differential stages connected in parallel to accom- plish rail to rail input common mode voltage range. with the common mode input voltage close to the power supplies, one of the two differential stages is switched off internally. to maintain compatibility with other operational amplifiers, this switching point has been se- lected to be about 1.5v above the negative supply voltage. as offset voltage trimming on the ald4704a/ald4704b/ald4704 is made when the input voltage is symmetrical to the supply voltages, this internal switching does not affect a large variety of applications such as an inverting amplifier or non-inverting amplifier with a gain greater than 2.5 (5v operation), where the common mode voltage does not make excursions below this switching point. 3. the input bias and offset currents are essentially input protection diode reverse bias leakage currents, and are typically less than 1pa at room temperature. this low input bias current assures that the analog signal from the source will not be distorted by input bias currents. for applications where source impedance is very high, it may be neces- sary to limit noise and hum pickup through proper shielding. 4. the output stage consists of class ab complementary output drivers, capable of driving a low resistance load. the output voltage swing is limited by the drain to source on-resistance of the output transistors as determined by the bias circuitry, and the value of the load resistor when connected. in the voltage follower configuration, the oscillation resistant feature, combined with the rail to rail input and output feature, makes the ald4704a/ald4704b/ald4704 an effective analog sig- nal buffer for medium to high source impedance sensors, transducers, and other circuit networks. 5. the ald4704a/ald4704b/ald4704 operational amplifier has been designed with static discharge protection and to minimize latch up. however, care must be exercised when handling the device to avoid strong static fields. in using the operational amplifier, the user is advised to power up the circuit before, or simultaneously with, any input voltages applied and to limit input voltages to not exceed 0.3v of the power supply voltage levels. alternatively, a 100k ? or higher value resistor at the input terminals will limit input currents to accept- able levels while causing very small or negligible accuracy effects.
ald4704a/ald4704b advanced linear devices 5 of 9 ald4704 typical performance characteristics (cont'd) open loop voltage as a function of frequency frequency (hz) 1 10 100 1k 10k 1m 10m 100k 120 100 80 60 40 20 0 -20 open loop voltage gain (db) 90 0 45 180 135 phase shift in degrees v s = 5.0v t a = 25 c large - signal transient response v s = 5.0v t a = 25 c r l = 1k ? c l = 50pf 5v/div 5v/div 2 s/div small - signal transient response v s = 5.0v t a = 25 c r l = 1.0k ? c l = 50pf 100mv/div 50mv/div 1 s/div open loop voltage gain as a function of load resistance load resistance ( ? ) 1k 10k 1000k 100k 1000 100 10 1 open loop voltage gain (v/mv) v s = 5.0v t a = 25 c input offset voltage as a function of common mode input voltage common mode input voltage (v) -4 -2 0 +2 +4 +6 15 10 5 0 -5 -10 -15 input offset voltage (mv) v s = 5.0v t a = 25oc input offset voltage as a function of ambient temperature representative units ambient temperature ( c) input offset voltage (mv) -50 -25 0 +25 +50 +75 +100 +125 +4 +5 +3 +1 +2 0 -2 -1 -4 -3 -5 v s = 5.0v voltage noise density as a function of frequency frequency (hz) 10 100 1k 10k 100k 150 125 100 75 50 25 0 1000k voltage noise density (nv/ hz) v s = 5.0v t a = 25 c r l = 10k ? output voltage swing as a function of supply voltage supply voltage (v) output voltage swing (v) 3 0 1 2 3 4 5 6 7 r l = 2k ? 6 5 4 2 7 -55 c t a 125 c r l = 10k ?
ald4704a/ald4704b advanced linear devices 6 of 9 ald4704 typical applications rail-to-rail voltage follower/buffer rail-to-rail voltage comparator - + v in +10v c l r l 0.1 f z in = 10 12 ? ~ 400pf 1.5k ? v out 0 v in 10v - + 50k 0.1 f 10m v in +12v +12v v out photo detector current to voltage converter low offset summing amplifier input 1 input 2 - + +5v 0.1 f 0.1 f -5v gain = 5 c l = 4000pf * circuit drives large load capacitance 4000pf 10k 10k 50k v out + - +5v -5v r f = 5m i photodiode v out = 1 x r f r l 1.5k precision charge integrator wien bridge oscillator (rail-to -rail) sine wave generator + 1000 pf 1 m ? +5v -5v v in out v 10k - + 10k 10k +5v -5v .01 f 1 2 rc f = 1.6k hz c = .01 f r = 10k ~ = v out ~ bandpass network low pass filter (rfi filter) cutoff frequency = r 1 c 1 = 3.2khz gain = 10 frequency roll-off 20db/decade 1 + r f 100k 5k 5k 0.02 f r 1 r 1 c 1 +9v v in v out - r 1 = 10k c 1 = 100nf r 2 = 10k c 2 = 500pf low frequency breakpoint ?l = 2 r 1 c 1 = 160hz high frequency cutoff ?h = 2 r 2 c 2 = 32khz 1 1 + +5v -5v c 1 r 1 c 2 r 2 v in v out -
ald4704a/ald4704b advanced linear devices 7 of 9 ald4704 millimeters inches min max min max dim a a 1 b c d-14 e e h l s 1.75 0.25 0.45 0.25 8.75 4.05 6.30 0.937 8 0.50 0.053 0.004 0.014 0.007 0.336 0.140 0.224 0.024 0 0.010 0.069 0.010 0.018 0.010 0.345 0.160 0.248 0.037 8 0.020 1.27 bsc 0.050 bsc 1.35 0.10 0.35 0.18 8.55 3.50 5.70 0.60 0 0.25 ? 14 pin plastic soic package soic-14 package drawing e d e a a 1 b s (45 ) l c h s (45 ) ?
ald4704a/ald4704b advanced linear devices 8 of 9 ald4704 14 pin plastic dip package pdip-14 package drawing b 1 d s b e a 2 a 1 a l e e 1 c e 1 ? millimeters inches min max min max dim a a 1 a 2 b b 1 c d-14 e e 1 e e 1 l s-14 ? 3.81 0.38 1.27 0.89 0.38 0.20 17.27 5.59 7.62 2.29 7.37 2.79 1.02 0 5.08 1.27 2.03 1.65 0.51 0.30 19.30 7.11 8.26 2.79 7.87 3.81 2.03 15 0.105 0.015 0.050 0.035 0.015 0.008 0.680 0.220 0.300 0.090 0.290 0.110 0.040 0 0.200 0.050 0.080 0.065 0.020 0.012 0.760 0.280 0.325 0.110 0.310 0.150 0.080 15
ald4704a/ald4704b advanced linear devices 9 of 9 ald4704 e e 1 c e 1 ? d s b 1 e b l a l 2 a 1 l 1 a a 1 b b 1 c d-14 e e 1 e e 1 l l 1 l 2 s ? 3.55 1.27 0.97 0.36 0.20 -- 5.59 7.73 3.81 3.18 0.38 -- 0 5.08 2.16 1.65 0.58 0.38 19.94 7.87 8.26 5.08 -- 1.78 2.49 15 millimeters inches min max min max dim 0.140 0.050 0.038 0.014 0.008 -- 0.220 0.290 0.150 0.125 0.015 -- 0 0.200 0.085 0.065 0.023 0.015 0.785 0.310 0.325 0.200 -- 0.070 0.098 15 2.54 bsc 7.62 bsc 0.100 bsc 0.300 bsc 14 pin cerdip package cerdip-14 package drawing
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